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EPOX EP-MVP3C MOTHERBOARD REVIEW
Last updated: 07/29/03

CHIPSET.  The EP-MVP3C uses the VIA Apollo MVP3 chipset, which consists of two chips:  the VT82C598 System Controller, or "North Bridge" in super7 lingo, and VT82C596 Mobile PCI Integrated Peripheral Controller, or "South Bridge".   The VT82C598 is located to the left of the system memory sockets and the VT82C596 is under the PCI expansion bus sockets.  Both chips are very complex and do many things; but, (very) simply put, the North Bridge controls the system, is the CPU to PCI bus bridge, and interfaces the CPU to the system memory, cache', and AGP graphics.  The South Bridge hangs off the PCI bus, controls the UDMA hard disk drives and Plug 'n Play, provides a bridge to the ISA bus, interfaces the CMOS BIOS, and takes care of the I/O functions such as the USB and keyboard interfaces.

This variation of the chipset differs from the MVP3 chipset used in the EP- 58MVP3C-M (let's call it the "58").  It used the VT82C586 South Bridge.  The VT82C596 used by this board has additional features for power management and power plane control.

Other chips include three by Winbond:

  • WW83877TF multi I/O - floppy, parallel port, and serial ports

  • W83194R-58 clock generator for the VIA chipset

  • W83781D system hardware monitoring chip

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