ALiMAGIK 1 AMD Athlon Super Northbridge
Product Brief
Last updated: 7/30/00

The following are quoted excerpts from a Product Brief provided by ALi. Larry

M1647 is ALi’ s new generation of PCI Northbridge chip supporting the latest Socket A AMD Athlon TM Processors.  It Interfaces with the 66/100/133 double data rate S2K front side bus (FSB).  It is a single chip solution which provides high performance memory interface for both 66/100/133 SDR and 200/266 DDR. The feasible PC 266-DDR enables 2.1 GB/s peak bandwidth between the system memory and Northbridge to boost system performance to the next level. With AGP 1x/2x/4x supports, M1647 prepares system designers with enough head room to interface with different graphics solutions to fulfill various market requirements. ALi also manufactures a series of feature-rich, highly integrated Southbridge devices (M1543C, M1535D/M1535, M1535D+/M1535+) which seamlessly work with M1647 as a complete, flexible and cost-effective solution for Desktop and Notebook designers. M1647 also incorporate ALi’ s proven power management support which is particularly crucial to mobile applications.

Processor Support

• Supports the Athlon TM family processor. Host bus frequency can be either 100MHz, 133MHz double data rate
• 64-bit data bus and 32-bit addressing
• Optimum buffering architecture design for CPU to memory, AGP and PCI read/write
• Support both S2K bus open-drain and push-pull mode
• Support notebook features, including FID change special cycle
• Support 8 outstanding processor commands
• Support 8 outstanding system probe commands
• Flexible configured to support back to back read transfer in 1QW or 2QW
• Support back to back write transfer
• Optimized processor command scheduling and reordering
• Support synchronous / asynchronous clock mode between processor and memory interface with optimized latency

Memory Support

• Supports SDR w/ 66, 100, 133MHz / DDR 200, 266MHz
• Supports symmetrical and asymmetrical SDRAM / DDR addressing
• Supports 4, 16, 64, 128, 256, 512Mbit SDRAM / DDR
• Maximum memory size : 3GB
• Support 6 memory rows with per byte access on each row
• Supports memory shadowing
• x-1-1-1-1-1-1-1 back-to-back page hit
• CAS before RAS and self refresh for SDRAM
• Pipelined SDRAM / DDR cycle control with hidden pre-charge
• Dynamic switching CKE algorithm
• Supports LVTTL / SSTL2 signal level

Accelerated Graphics Port (AGP) Interface

• Supports AGP specification V2.0
• Supports up to 128 entries table look aside buffer for Graphic Address Remapping Table (GART)
• AGP 66MHz protocol
• AGP 1X / 2X / 4X sideband function
• 28 entries Request queue
• 64 QWORDs Read buffer
• 32 QWORDs Write buffer

PCI Bus Support

• Supports synchronous / asynchronous clock mode between the processor bus and the PCI bus
• 32-bit Address / Data PCI bus using PCI bus driver technology
• Supports up to 6 PCI masters excluding the M1647 and PCI-to-ISA bridge
• Parity protection on all PCI bus signals
• Fully supports PCI Configuration Space Enable (CSE) protocol
• Fully compliant with PCI Rev. 2.2
• Supports delayed transaction
• Dynamic memory prefetch algorithm and programmable post write
  flush algorithm
• Data Collection/Write assembly of line bursts
• Supports concurrent PCI bus burst transfer at zero wait-states
• 133 MB/sec data streaming for PCI bus to SDRAM / DDR access with minimum latency

Power Management

• Supports ACPI 1.0b and Legacy green
• Support PCI Mobile CLKRUN#
• Support AGP Mobile BUSY# / STOP#
• Internally dynamic clock stop

Packaging

• 528 balls 35x35mm BGA package

7/30/00  ALi originally (7/26/00) sent me this VIA E-Mail.  It was not available on their site then.  They now have info on the Northbridge and Southbridge chips in the ALiMAGIK 1 chipset posted on their site.  I am trying to get still more info to add to this page/article on the chipset.Please see our Contact page if you have any comments or corrections that would make this article better. Please use our Forums if you need help with a computer or network problem.